20.1.2 Floating point registers

The floating point and extended registers are accessed thru the '!fpregs' command. This command depends on the cpu and the operating system, so floating point registers are usually stored in a quite weird way at kernel level.

Here's an example on intel with MMX and STX registers:

[0xB7F9E810]> !fpregs
 cwd = 0x037f  ; control    swd = 0x0000  ; status
 twd = 0x0000  ; tag        fip = 0x0000  ; eip of fpu opcode
 fcs = 0x0000               foo = 0x0000  ; stack
 fos = 0x0000
 mm0 = 0000 0000 0000 0000     st0 = 0 (0x00000000)
 mm1 = 0000 0000 0000 0000     st1 = 0 (0x00000000)
 mm2 = 0000 0000 0000 0000     st2 = 0 (0x00000000)
 mm3 = 0000 0000 0000 0000     st3 = 0 (0x00000000)
 mm4 = 0000 0000 0000 0000     st4 = 0 (0x00000000)
 mm5 = 0000 0000 0000 0000     st5 = 0 (0x00000000)
 mm6 = 0000 0000 0000 0000     st6 = 0 (0x00000000)
 mm7 = 0000 0000 0000 0000     st7 = 0 (0x00000000)

And the same for mips:

[0x2AAA8820]> !fpregs                                                                                                         
f00: 0xffffffffffffffff f02: 0xffffffffffffffff
f04: 0xffffffffffffffff f06: 0xffffffffffffffff
f08: 0xffffffffffffffff f10: 0xffffffffffffffff
f12: 0xffffffffffffffff f14: 0xffffffffffffffff
f16: 0xffffffffffffffff f18: 0xffffffffffffffff
f20: 0xffffffffffffffff f22: 0xffffffffffffffff
f24: 0xffffffffffffffff f26: 0xffffffffffffffff
f28: 0xffffffffffffffff f30: 0xffffffffffffffff

(On mips the default value for undefined registers is '-1' and not '0'.

You can enable them in the visual debugger view with the 'e dbg.fpregs=true' command. The '!fpregs*' command is also available to export the registers as flags.